The emerging new interest in artificial intelligence (AI) has led to a paradigm shift in the field of computer architecture. Architectures that focus on machine learning and neuromorphic computing are increasingly being adopted into the mainstream. The design of future processors is increasingly being predicated on metrics based on cognitive applications. The interplay between the development of state-of-the-art algorithms in cognitive sciences, computer vision, speech recognition and the design of the underlying system architectures has resulted in several cross-disciplinary advances. After highly successful editions of the Workshop on Cognitive Architectures in the past, in this year’s edition we expect to consolidate the many recent works in this field and provide concrete roadmaps as to what subsequent directions the research in this field should take. This workshop at HPCA proposes to bring together researchers and practitioners within systems architecture, computer vision, artificial intelligence and robotics to discuss the latest ideas, applications and commercialization strategies around the cognitive computing theme. In addition, it also aims to foster an interest in such emerging fields among industry and academic researchers alike. The primary focus is expected to be on driving towards a better understanding of key cognitive algorithms of interest and the allied architectural support issues.
Of particular interest are application areas of mobile cognition, which may comprise of a distributed swarm of intelligent computing modules. This paradigm is relevant in the context of unmanned aerial vehicles and connected cars. Further, the rising investment by industry in designing IoT (Internet-of-Things) platforms, has resulted in several opportunities to build architectures that support capabilities such as intelligent data exchange and interaction with cloud, pattern matching, data analytics and other cognitive aspects to build truly transformative systems.
Recent advances in architectures for AI have been instrumental in the development and deployment of autonomous systems, such as self-driving vehicles, and unmanned aerial vehicles. The Tesla FSD and Nvidia Xavier SoC are examples of commercial chips in the autonomous driving space with dedicated hardware units for processing AI algorithms. Next-generation processors in this domain are being envisioned as multi-agent systems that support swarm-based decision-making, as well as intelligent data exchange capabilities amongst each other or with a backing cloud server. The proliferation of mobile computing platforms, Internet-of-Things and cloud support features thereof have opened up exciting new opportunities for such real-time, mobile (distributed or swarm-driven) cognition. The CogArch workshop solicits formative ideas and new product offerings in this general space. Topics of interest include (but are not limited to):
The workshop shall consist of regular presentations and/or prototype demonstrations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers from industry and academia as well as interactive panel discussions to kindle further interest in these research topics. Submissions will be reviewed by a workshop Program Committee, in addition to the organizers.
Submitted manuscripts must be in English of up to 2 pages (with same
formatting guidelines as main
conference) indicating the type of submission: regular presentation or prototype
demonstration. Submissions should be sent to
December 6th December 13th, 2019 (deadline
If you have questions regarding submission, please contact us: firstname.lastname@example.org
CogArch will feature a session where researchers can showcase innovative prototype demonstrations or proof-of-concept designs in the cognitive architecture space. Examples of such demonstrations may include (but are not limited to):
Dr. Rosario Cammarota ("Ro") is a Principal Research Scientist at Intel AI Research, where he grows the effort on privacy-preserving technologies and international standards for AI Systems. He received his Ph.D. degree in Computer Science from the University of California, Irvine, in 2013. He serves on the program and organizing committees of several premier hardware and embedded security conferences and workshops. He is a Senior Member of IEEE, a prolific inventor and one of the recipients of the SRC Outstanding Industry Liaison Awards in 2017, 2018, and 2019.
Dr. Yu-Hsin Chen is a Research Scientist at Facebook focusing on hardware/software co-design to enable on-device AI for AR/VR systems.
Dr. Chen received the M.S. and Ph.D. degrees in Electrical Engineering and Computer Science (EECS) from Massachusetts Institute of
Technology (MIT), Cambridge, MA, in 2013 and 2018, respectively. He received the 2018 Jin-Au Kong Outstanding Doctoral Thesis Prize
in Electrical Engineering at MIT and the 2019 ACM SIGARCH/IEEE-CS TCCA Outstanding Dissertation Award. Prior to joining Facebook, he
was a research scientist at Nvidia Research.
Dr. Chen was the recipient of the 2015 Nvidia Graduate Fellowship, 2015 ADI Outstanding Student Designer Award, and 2017 IEEE SSCS Predoctoral Achievement Award. His work on the dataflows for CNN accelerators was selected as one of the Top Picks in Computer Architecture in 2016. He co-taught a tutorial on “Hardware Architectures for Deep Neural Networks” at MICRO-49, ISCA 2017, MICRO-50, and ISCA 2019. He has served on the technical program committees for Conference on Machine Learning and Systems (MLSys) and the ERC for the International Symposium on High-Performance Computer Architecture (HPCA).
|Sunday February 23rd, 2020
(all times are in Pacific Time)
|8:30 - 8:45 AM||Introduction and Welcoming Remarks|
|8:45 - 9:30 AM||Invited Talk: "Frameworks for Building Privacy-Preserving and Performing AI Systems: The Lessons Learned"
Dr. Rosario Cammarota (Intel AI)
|9:30 - 10:00 AM||"PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-Efficient ReRAM"
Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti, Sapan Agarwal, Matthew Marinella, Martin Foltin, John Paul Strachan, Dejan Milojicic, Wen-mei Hwu, Kaushik Roy (Purdue University)
|10:00 - 10:30 AM||Coffee Break|
|10:30 - 11:00 AM||"MASR: A Modular Accelerator for Sparse RNNs"
Udit Gupta, Brandon Reagan, Lillian Pentecost, Marco Donato, Thierry Tambe, Alexander M. Rush, Gu-Yeon Wei and David Brooks (Harvard University)
|11:00 - 11:30 AM||"WiSEMAN: A Weightless Emotion-Driven Neural Architecture for Planning-Related Tasks"
Leopoldo Lusquino Filho, Aluizio Lima Filho, Felipe França and Priscila Lima (Universidade Federal do Rio de Janeiro)
|11:30 AM - 12.00 PM||Demo Presentation: "Towards a General Purpose Cognitive Drone"
Sam Jijina, Adriana Amyette, Ramyad Hadidi and Hyesoon Kim (Georgia Tech)
|12:00 - 1:15 PM||Lunch|
|1:15 - 2:00 PM||Invited Talk: "On-Device AI for Augmented Reality (AR) Systems"
Dr. Yu-Hsin Chen (Facebook)
|2:00 - 2.30 PM||Demo Presentation: "MAERI on FPGA: From Concept to Conception"
Yehowshua Immanuel and Tushar Krishna (Georgia Tech)
|2:30 - 3:00 PM||Coffee Break|
|3.00 - 3.30 PM||"Real-Time Machine Learning on TinyML Systems"
Bardienus Duisterhof, Srivatsan Krishnan, Jonathan Cruz, Colby Banbury, William Fu, Aleksandra Faust, Guido de Croon and Vijay Reddi (Harvard University, Robotics at Google, Delft University of Technology, The University of Texas at Austin)
|3:30 PM||Concluding Remarks|
Vijay Janapa Reddi is an Associate Professor of Electrical Engineering at Harvard University. His research interests are in edge computing and IoT systems, specifically in the context of mobile devices and autonomous machines. He holds a Ph.D. degree from Harvard University.
Augusto Vega is a Research Staff Member at IBM T. J. Watson Research Center involved in research and development work in the areas of highly-reliable power-efficient embedded designs, cognitive systems and mobile computing. He holds a Ph.D. degree from Polytechnic University of Catalonia (UPC), Spain.
Karthik Swaminathan is a Research Staff Member at IBM T. J. Watson Research Center. His research interests include power-aware architectures, domain-specific accelerators and emerging device technologies in processor design. He is also interested in architectures for approximate and cognitive computing, particularly in aspects related to their reliability and energy efficiency. He holds a Ph.D. degree from Penn State University.
Nandhini Chandramoorthy is a Research Staff Member at IBM T. J. Watson Research Center involved in Deep Neural Network ASIC design with techniques to improve reliable operation at very low supply voltages, and pre-RTL performance modeling tools for multi-core architectures. She holds a Ph.D. degree from Penn State University.
Alper Buyuktosunoglu is a Research Staff Member at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM Power Systems and IBM z Systems in the area of high performance, reliability and power-aware computer architectures. He holds a Ph.D. degree from University of Rochester.
Pradip Bose is a Distinguished Research Staff Member and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over thirty-three years of experience at IBM, and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds a Ph.D. degree from University of Illinois at Urbana-Champaign.